Fancort is the industry leader in component lead preparation services for the Semiconductor and Aerospace industries. We have over thirty-nine years of experience in lead forming of a wide variety of packages, including large and small flatpacks and quadpacks, DIPs, fiberoptic headers and devices that require conversion from through-hole to SMT. We use our unique universal and dedicated tooling systems and complete process control to ensure accuracy and quick turnaround of your parts to JEDEC and/or mil-spec dimensions, with optional services such as leak testing and tinning if required.
Form and Trim Features:
Fancort Industries is "ITAR registered, code M22953, as of 15-May-2008". Fancort is, also, listed with the US Government under Cage Code # 6L 152. Fancort is an approved NASA supplier of Forming Services and Tools.
Lead forming to Mil-std-883E and NASA Std FP 51 3414 Rev. H Section 3and IPC J-STD-001E-2010 / April 2010
Complete process control and documentation
Standard footprint layouts available, or we will design your custom footprint
All work is done in a controlled ESD Safe environment. Our facility meets all requirements for Class Zero applications (0-250 volts).
DOD MIL-STD-1686C Compliant
Turnaround can be as little as three days (typically 10 working days)
Inspection of incoming devices for lead skew or other deformity
Inspection report and Certificate of Compliance
Tinning and Gold Removal Features:
Lead tinning to NASA STD 8739.3 with Change #4, "workmanship STD for SMT" and Mil 2003.7
Fancort is NASA STD 8739.2 CERTIFIED for tinning Space grade flat packs and quad packs as of 21-September-2011.
"Flux", for Gold leaded parts, is used at Fancort's discretion. Fancort's standard is: No Flux, no clean flux or OA Flux per J004
Flux is a cleaning process that is normally not needed for high reliability Gold parts.
Per Mil Std 2000A and J Std. Mil Std 200A section 5.3.1.3 "For surface mounted parts, the gold shall be removed from at least 95% of the total gold plated surface and there shall be no gold on the to be soldered areas of the part."
Fancort's solder pot testing complies with J Std 001 contamination limits. Table 3-1 on page 5. Section 3.9.3 on page 6 for gold removal. (Similar to mil std 2000)
Fancort standard Mil-spec process is a double dip procedure to remove the gold first, then add the second coating
The normal Lead Tinning height is about 1/2 way up the leg, giving full heel coverage for excellent soldering to the PC Board
Solder alloys used for solder dip are in accordance with J-STD-006, or equivalent, and shall contain a minimum of 3% lead. Hot solder dip meets the tinning requirements of ANSI/IPC J-STD-001, Class 3, and tinned leads shall meet the solderability requirements of J-STD-002, Category 3.
Fine and Gross Leak Testing
Leak testing to Mil-std 883, Med + Mod 1014.12, conditions A&C fine and gross
Adjustable Shipping matrix trays to hold two and four-sided SMT devices; includes ESD packaging
Applicable Specifications & Standards:
ANSI/ISO/ASQ Q9001-2008, MGMT review and certification pending.
IPC/EIA J-STD-001, Requirements for Soldered Electrical and Electronic Assemblies